1. Field
The present invention relates to a nitride semiconductor device and a manufacturing method thereof, and more particularly, to a nitride semiconductor device capable of normally-off operation, and a manufacturing method thereof.
2. Description of the Related Art
There has been growing interest in reduction of power consumption due to green energy policy. To achieve this, improvement in power conversion efficiency is necessary. In the power conversion, efficiency of a power switching device has influence on the entire power conversion efficiency.
At present, most of power devices generally used are power MOSFETs or IGBTs using silicon. However, an increase in efficiency of the devices is limited due to material limitations of silicon. To overcome this, there have been patent applications which are to increase the conversion efficiency by manufacturing a transistor using a nitride semiconductor such as gallium nitride (GaN).
However, for example, a high electron mobility transistor (HEMT) structure using GaN becomes ON state in which current flows due to low resistance between a drain electrode and a source electrode when a gate voltage is 0V (normal state). Accordingly, this causes consumption of current and power, and there is a disadvantage that a negative voltage (for example, −5V) should be applied to a gate electrode so that the HEMT structure becomes OFF state (normally-on structure).
To overcome this disadvantage of the normally-on structure, patent applications as shown in FIGS. 6 and 7 were disclosed. FIGS. 6 and 7 show conventional HEMT structures.
FIG. 6 shows a drawing disclosed in U.S. patent publication No. 2007-0295993. As shown in FIG. 6, in an AlGaN layer, concentration of a channel formed during growth of the AlGaN layer 133 is adjusted by implanting ions into a region under a gate G and a region adjacent to a gate electrode G between the gate G and a drain D. In FIG. 6, normally-off operation is implemented by controlling carrier concentration of a channel region 131 under the gate G by using ion implantation.
FIG. 7 is a drawing disclosed in U.S. Pat. No. 7,038,253. A 2DET channel 135 is prevented from being formed under a gate electrode G by applying an insulation layer 140 on a channel layer 131 formed between first and second electron donor layers 133a and 133b and forming the gate electrode G on the insulation layer 140. In FIG. 7, normally-off operation is implemented by etching under a gate G through a recess process.